Difference between revisions of "Assembler:Commands:DIV"
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'''command''' div ''operand'' | '''command''' div ''operand'' | ||
| − | + | Performs an unsigned division of two operands. | |
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| + | Divids the data register (high) and the accumulator register (low) by the operand. Placing the quotient in the accumulator register and the remainder in the data register. | ||
{| class="gallery" style="background-color:#f4f4f4" | {| class="gallery" style="background-color:#f4f4f4" | ||
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!align="left"|Dividend | !align="left"|Dividend | ||
!align="left"|Divisor | !align="left"|Divisor | ||
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|2^64 - 1 | |2^64 - 1 | ||
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The '''CF''', '''OF''', '''SF''', '''ZF''', '''AF''', and '''PF''' flags are undefined. | The '''CF''', '''OF''', '''SF''', '''ZF''', '''AF''', and '''PF''' flags are undefined. | ||
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| − | + | Divides (unsigned) the value in the AH:AL, DX:AX, EDX:EAX, or RDX:RAX registers (dividend) by the source operand (divisor) and stores the result in the AH:AL, DX:AX, EDX:EAX, or RDX:RAX registers. | |
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| − | + | The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor). Non-integral results are truncated (chopped) towards 0. The remainder is always less than the divisor in magnitude. Overflow is indicated with the '''#DE''' (divide error) exception rather than with the '''CF''' flag. | |
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| − | + | [http://c9x.me/x86/html/file_module_x86_id_72.html c9x.me/x86/html/file_module_x86_id_72.html] | |
| − | + | </div> | |
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// eax = 6, edx = 0 | // eax = 6, edx = 0 | ||
| + | {{AssemblerCommandSeeAlso}} | ||
| − | + | {{Template:AssemblerCommandExternalLinks}} | |
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Latest revision as of 15:43, 3 January 2018
command div operand
Performs an unsigned division of two operands.
Divids the data register (high) and the accumulator register (low) by the operand. Placing the quotient in the accumulator register and the remainder in the data register.
| Dividend | Divisor | Quotient | Remainder | Maximum Quotient | |
|---|---|---|---|---|---|
| Word/Byte | AX | r/m8 | AL | AH | 2^8 - 1 |
| Doubleword/Word | DX:AX | r/m16 | AX | DX | 2^16 - 1 |
| Quadword/Doubleword | EDX:EAX | r/m32 | EAX | EDX | 2^32 - 1 |
| Octoword/Quadword | RDX:RAX | r/m64 | RAX | RDX | 2^64 - 1 |
The CF, OF, SF, ZF, AF, and PF flags are undefined.
AL AH = AH:AL/operand : byte AX DX = DX:AX/operand : WORD EAX EDX = EDX:EAX/operand : DWORD RAX RDX = RDX:RAX/operand : QWORD
Divides (unsigned) the value in the AH:AL, DX:AX, EDX:EAX, or RDX:RAX registers (dividend) by the source operand (divisor) and stores the result in the AH:AL, DX:AX, EDX:EAX, or RDX:RAX registers.
The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor). Non-integral results are truncated (chopped) towards 0. The remainder is always less than the divisor in magnitude. Overflow is indicated with the #DE (divide error) exception rather than with the CF flag.
Command Parameters[edit]
| Parameter | Description |
|---|---|
| operand | The dividend operand |
Examples[edit]
div ecx
mov eax,6 mov edx,0 mov ecx,2 div ecx // eax = 3, edx = 0
mov eax,9 mov edx,0 mov esi,2 div esi // eax = 4, edx = 1
mov eax,0 mov edx,1 mov esi,0x10 div esi // eax = 0x10000000, edx = 0
mov eax,6 mov edx,0 mov [00123ABC],2 div [00123ABC] // eax = 6, edx = 0
mov eax,6 mov edx,0 mov [SomeSymbol],2 div [SomeSymbol] // eax = 6, edx = 0
